v.gen.native: improve few x64 generators (#10996)
parent
5a6d17786c
commit
6337325676
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@ -601,7 +601,7 @@ fn (mut g Gen) mov(reg Register, val int) {
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g.write8(0xbc) // r11 is 0xbb etc
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}
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else {
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panic('unhandled mov $reg')
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verror('unhandled mov $reg')
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}
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}
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g.write32(val)
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@ -618,18 +618,17 @@ fn (mut g Gen) mul_reg(a Register, b Register) {
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g.write8(0x48)
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g.write8(0xf7)
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g.write8(0xe8)
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g.println('mul $a')
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}
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.rbx {
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g.write8(0x48)
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g.write8(0xf7)
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g.write8(0xeb)
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g.println('mul $a')
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}
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else {
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panic('unhandled div $a')
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}
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}
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g.println('mul $a')
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}
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fn (mut g Gen) div_reg(a Register, b Register) {
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@ -641,19 +640,18 @@ fn (mut g Gen) div_reg(a Register, b Register) {
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g.write8(0x48)
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g.write8(0xf7)
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g.write8(0xf8)
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g.println('div $a')
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}
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.rbx {
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g.mov(.edx, 0)
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g.write8(0x48)
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g.write8(0xf7)
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g.write8(0xfb) // idiv ebx
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g.println('div $a')
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}
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else {
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panic('unhandled div $a')
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}
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}
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g.println('div $a')
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}
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fn (mut g Gen) sub_reg(a Register, b Register) {
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@ -661,10 +659,10 @@ fn (mut g Gen) sub_reg(a Register, b Register) {
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g.write8(0x48)
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g.write8(0x29)
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g.write8(0xd8)
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g.println('sub $a, $b')
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} else {
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panic('unhandled add $a, $b')
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}
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g.println('sub $a, $b')
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}
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fn (mut g Gen) add_reg(a Register, b Register) {
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@ -672,10 +670,14 @@ fn (mut g Gen) add_reg(a Register, b Register) {
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g.write8(0x48)
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g.write8(0x01)
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g.write8(0xd8)
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g.println('add $a, $b')
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} else if a == .rax && b == .rdi {
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g.write8(0x48)
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g.write8(0x01)
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g.write8(0xf8)
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} else {
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panic('unhandled add $a, $b')
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}
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g.println('add $a, $b')
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}
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fn (mut g Gen) mov_reg(a Register, b Register) {
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@ -690,6 +692,10 @@ fn (mut g Gen) mov_reg(a Register, b Register) {
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g.write8(0x48)
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g.write8(0x89)
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g.write8(0xc8)
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} else if a == .rax && b == .rdi {
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g.write8(0x48)
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g.write8(0x89)
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g.write8(0xf8)
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} else if a == .rdi && b == .rsi {
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g.write8(0x48)
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g.write8(0x89)
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@ -701,6 +707,7 @@ fn (mut g Gen) mov_reg(a Register, b Register) {
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} else {
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verror('unhandled mov_reg combination for $a $b')
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}
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g.println('mov $a, $b')
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}
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// generates `mov rbp, rsp`
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@ -918,10 +925,20 @@ fn (mut g Gen) assign_stmt(node ast.AssignStmt) {
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ie := node.right[i] as ast.IndexExpr
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var_name := ie.left.str()
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mut dest := g.get_var_offset(var_name)
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index := ie.index as ast.IntegerLiteral
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dest += index.val.int() * 8
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if ie.index is ast.IntegerLiteral {
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index := ie.index
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dest += index.val.int() * 8
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g.mov_var_to_reg(.rax, dest)
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} else if ie.index is ast.Ident {
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ident := ie.index
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var_offset := g.get_var_offset(ident.name)
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g.mov_var_to_reg(.edi, var_offset)
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g.mov_var_to_reg(.rax, dest)
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g.add_reg(.rax, .rdi)
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} else {
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verror('only integers and idents can be used as indexes')
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}
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// TODO check if out of bounds access
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g.mov_var_to_reg(.rax, dest)
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g.mov_reg_to_var(offset, .eax)
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}
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ast.StringLiteral {
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